/** ###################################################################
**     THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
**     Filename  : PGA2.C
**     Project   : voltmeter_led
**     Processor : MC56F8006_48_LQFP
**     Beantype  : Init_PGA
**     Version   : Bean 01.002, Driver 01.00, CPU db: 3.00.177
**     Compiler  : Metrowerks DSP C Compiler
**     Date/Time : 11/26/2008, 3:39 PM
**     Abstract  :
**         This bean provides initialization of the Programmable Gain Amplifier (PGA).
**         PGA is intended to pre-process ADC inputs,
**         it amplifies and converts differential signals to a single-ended value,
**         which is passed on to the ADC for conversion to digital format.

**     Settings  :
**          Bean name                                      : PGA2
**          Device                                         : PGA0
**          Settings                                       : 
**            Clock settings                               : 
**              PGA clock                                  : 2.00 MHz
**              Clock divide select                        : Input clock / 8
**              Latency                                    : 31.50 us
**              clk_gs pulses per conversion               : 4
**              Charge pump speed                          : 2000 kHz
**              Charge pump divisor                        : clk_cp / 4
**            Gain Select                                  : x1
**              S/H stage                                  : x1
**              Differential stage                         : x1
**              Differential to SE stage                   : x1
**            Trigger mode                                 : Software
**            Power mode                                   : High power
**            Calibration mode                             : Offset calibration
**          Pins                                           : 
**            Differential positive input pin              : Enabled
**              pin                                        : GPIOC1_PGA0NON_INV_ANA7_CMP2_M2
**              pin signal                                 : 
**            Differential negative input pin              : Enabled
**              pin                                        : GPIOC2_PGA0INV_ANA9_CMP2_P4
**              pin signal                                 : 
**          Initialization                                 : 
**            Module enable                                : Disabled
**            Enable peripheral clock                      : yes
**            Call Init method                             : yes
**     Contents  :
**         Init - void PGA2_Init(void);
**
**     (c) Copyright UNIS, a.s. 1997-2008
**     UNIS, a.s.
**     Jundrovska 33
**     624 00 Brno
**     Czech Republic
**     http      : www.processorexpert.com
**     mail      : info@processorexpert.com
** ###################################################################*/

/* MODULE PGA2. */

#include "PGA2.h"

/*
** ===================================================================
**     Method      :  PGA2_Init (bean Init_PGA)
**
**     Description :
**         This method initializes registers of the PGA module
**         according to this Peripheral Initialization Bean settings.
**         Call this method in the user code to initialize the module.
**         By default, the method is called by PE automatically; see
**         <Call Init method> property of the bean for more details.
**     Parameters  : None
**     Returns     : Nothing
** ===================================================================
*/
void PGA2_Init(void)
{
  /* PGA0_CNTL1: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,BP=0,CALMODE=2,CPD=2 */
  setReg16(PGA0_CNTL1, 0x12);           
  /* PGA0_CNTL2: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,SWTRIG=0,NUM_CLK_GS=3,ADIV=3 */
  setReg16(PGA0_CNTL2, 0x0F);           
  /* PGA0_CNTL0: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,TM=1,GAINSEL=0,LP=0,EN=0 */
  setReg16(PGA0_CNTL0, 0x80);           
}

/* END PGA2. */

/*
** ###################################################################
**
**     This file was created by UNIS Processor Expert 2.99 [04.17]
**     for the Freescale 56800 series of microcontrollers.
**
** ###################################################################
*/
